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Picocom Accelerates 5G Communications SoC Development with Cadence Palladium Emulation

The Palladium Emulation Platform enabled Picocom to increase verification throughput and accelerate embedded software development.

Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced that Picocom has deployed the Cadence® Palladium® Enterprise Emulation Platform to accelerate the verification and pre-silicon software validation of its system-on-chip (SoC) designs for 5G open radio access network (RAN) applications. Using the Palladium emulation platform, Picocom achieved faster hardware and software integration, experiencing an emulation speedup of 1000X when compared with RTL simulation.

The Palladium emulation platform gave Picocom the ability to bring up system software on RISC-V cores in advance of silicon being available. Using the Palladium emulation platform, Picocom took advantage of fast, predictable compile and was able to quickly debug its design. Picocom also met its power budget requirements using the Palladium Dynamic Power Analysis (DPA) feature, the Cadence Joules RTL Power Solution and the Cadence Voltus IC Power Integrity Solution to identify, capture and analyze power activity. To run efficient interface testing, Picocom utilized the Cadence SpeedBridge® adapters for PCI Express® (PCIe®) 4.0, USB 3.0 and Ethernet. Additionally, Picocom’s international team of engineers took advantage of the Palladium emulation platform’s remote accessibility, which allowed them to seamlessly work together to validate their designs.

“Developing 5G applications is extremely competitive, so we have to work at top speed while delivering the best products,” said Peter Claydon, President, Picocom. “We're emulating a 5G NR RAN where the slot length is generally 0.5ms, and most of the time, we need to emulate a few slots, which Palladium emulation now enables us to do in a matter of minutes. The Cadence Palladium emulation platform has dramatically improved our team’s efficiency, and the investment proved to be well worth it.”

The Palladium Enterprise Emulation Platform is part of the Cadence Verification Suite and supports the company's Intelligent System Design strategy, enabling SoC design excellence. The Cadence Verification Suite is comprised of core engines and verification fabric technologies that increase verification throughput and design quality, fulfilling verification requirements for a wide variety of applications and vertical segments. For more information on the Palladium emulation platform, please visit www.cadence.com/go/PalladiumSuccess.

About Cadence

Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications, including consumer, hyperscale computing, 5G communications, automotive, mobile, aerospace, industrial and healthcare. For seven years in a row, Fortune magazine has named Cadence one of the 100 Best Companies to Work For. Learn more at cadence.com.

© 2021 Cadence Design Systems, Inc. All rights reserved worldwide. Cadence, the Cadence logo and the other Cadence marks found at www.cadence.com/go/trademarks are trademarks or registered trademarks of Cadence Design Systems, Inc. PCI Express and PCIe are registered trademarks of PCI-SIG. All other trademarks are the property of their respective owners.

Picocom deployed the @Cadence® Palladium® Enterprise Emulation Platform to accelerate the verification and pre-silicon software validation of its system-on-chip (SoC) designs for 5G open radio access network (RAN) applications.

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